1. Field of the Invention
The present invention generally relates to an image processing circuit, a combined image processing circuit, and an image forming apparatus, all of which use a line buffer for performing image processing.
2. Description of the Related Art
In image processing such as filtering and toning, etc., not only a single target pixel but also a plurality of surrounding pixels situated on the periphery of such a target pixel are used. FIG. 1 shows the single target pixel D11 to be processed in a 3×3 matrix processing and its surrounding pixels D00, D01, D02, D10, D12, D20, D21, and D22. In the 3×3 matrix processing, when processing the pixel D11, pixel data of the pixels D10, D12 in front of and at the back of pixel D11, the pixel D01 at one line above the pixel D11 and pixels D00 and D02 in front of and at the back of pixel D01, and the pixel D21 at one line below the pixel D11 and pixels D20 and D22 in front of and at the back of pixel D21 are made reference to and used.
The pixel data of the pixels in the line preceding and following the line where the single target pixel is situated, including pixels D0n, D1n, and D2n (n: 0, 1, 2), are held (stored) in a memory circuit called a line buffer and are used for later image processing. The total storage capacity of line buffers is determined according to the intended image processing. For example, in order to process pixels in the short side direction (i.e. in a single image line) of an A3 size paper (approximately 7,500 pixels per image line) with image precision of 600 dpi, which enables 600 pixels to be included in one inch, the line buffer/line buffers with a total storage capacity of approximately 8 KB are necessary. As another example, in order to perform image processing with respect to the A3 size paper with image precision of 1,200 dpi, the line buffer/line buffers with a total storage capacity of 16 KB, which is approximately the double of the processing of the A3 size paper with image precision of 600 dpi, are necessary.
The necessary number of line buffers increases as the number of image processing tasks increases. For example, when five different image processing tasks (for example, gain adjustment, filtering of a 5×5 matrix, noise elimination of a 3×3 matrix, size change, and error diffusion) are to be performed, ten 8-KB line buffers are necessary. Therefore, in order to realize these five different image processing tasks by a single chip large-scale integrated circuit (LSI), it is necessary to mount ten 8-KB line buffers onto the single LSI. In order to perform the above mentioned five different image processing tasks with respect to an A0 size paper with image precision of 600 dpi, a total of ten 24-KB line buffers is necessary since the short side direction is handled as image lines and the amount of data of a single image line is approximately three times of that of the A3 size paper. In other words, 30×8-KB line buffers are necessary in order to perform the above mentioned five different image processing tasks with respect to a single image line in the short side direction of the A0 size paper with image precision of 600 dpi.